{ "canonical_url": "https://crates.flyology.org/community/", "catalog": { "name": "community", "repository_url": "https://github.com/alire-project/alire-index", "revision": "cd12c6aa35b7d6483841517305d57ba167ec78d0" }, "generated_at": "2026-08-23T04:55:42Z", "index": { "version": "1.4.0" }, "package": { "catalog": "community", "description": "light-tasking runtime for the STM32G0XX SoC", "development_only": false, "latest_version": "15.4.0", "name": "light_tasking_stm32g0xx", "selected_version": "15.4.0", "versions": [ { "dependants": [], "dependencies": [ { "catalog": "community", "condition": null, "name": "gnat_arm_elf", "package": "gnat_arm_elf", "provided_version": "15.3.1", "requirement": "^15", "resolved": true, "version": "15.3.1" } ], "development": false, "external": false, "manifest": { "authors": [ "AdaCore", "Daniel King" ], "configuration": { "generate_c": false, "output_dir": "gnat_user", "variables": { "AHB_Pre": { "default": "DIV1", "type": "Enum", "values": [ "DIV1", "DIV2", "DIV4", "DIV8", "DIV16", "DIV64", "DIV128", "DIV256", "DIV512" ] }, "APB_Pre": { "default": "DIV1", "type": "Enum", "values": [ "DIV1", "DIV2", "DIV4", "DIV8", "DIV16" ] }, "HSE_Bypass": { "default": false, "type": "Boolean" }, "HSE_Clock_Frequency": { "default": 8000000, "first": 1, "last": 48000000, "type": "Integer" }, "HSI_Div": { "default": "DIV1", "type": "Enum", "values": [ "DIV1", "DIV2", "DIV4", "DIV8", "DIV16", "DIV32", "DIV64", "DIV128" ] }, "Interrupt_Secondary_Stack_Size": { "default": 128, "first": 1, "type": "Integer" }, "Interrupt_Stack_Size": { "default": 1024, "first": 1, "type": "Integer" }, "LSE_Bypass": { "default": false, "type": "Boolean" }, "LSE_Enabled": { "default": false, "type": "Boolean" }, "LSI_Enabled": { "default": true, "type": "Boolean" }, "MCU_Flash_Memory_Size": { "default": "B", "type": "String" }, "MCU_Sub_Family": { "default": "G0B1", "type": "Enum", "values": [ "G030", "G031", "G041", "G050", "G051", "G061", "G070", "G071", "G081", "G0B0", "G0B1", "G0C1" ] }, "PLL_M_Div": { "default": 2, "first": 1, "last": 8, "type": "Integer" }, "PLL_N_Mul": { "default": 16, "first": 8, "last": 86, "type": "Integer" }, "PLL_P_Div": { "default": 2, "first": 2, "last": 32, "type": "Integer" }, "PLL_P_Enable": { "default": true, "type": "Boolean" }, "PLL_Q_Div": { "default": 2, "first": 2, "last": 8, "type": "Integer" }, "PLL_Q_Enable": { "default": true, "type": "Boolean" }, "PLL_R_Div": { "default": 2, "first": 2, "last": 8, "type": "Integer" }, "PLL_Src": { "default": "HSI16", "type": "Enum", "values": [ "HSE", "HSI16" ] }, "RAM_Parity_Check": { "default": "Disabled", "type": "Enum", "values": [ "Disabled", "Enabled" ] }, "SYSCLK_Src": { "default": "PLLRCLK", "type": "Enum", "values": [ "LSE", "LSI", "HSE", "PLLRCLK", "HSISYS" ] } } }, "depends-on": [ { "gnat_arm_elf": "^15" } ], "description": "light-tasking runtime for the STM32G0XX SoC", "licenses": "GPL-3.0-or-later WITH GCC-exception-3.1", "long-description": "## Usage\n\nFirst edit your `alire.toml` file and add the following elements:\n - Add `light_tasking_stm32g0xx` in the dependency list:\n ```toml\n [[depends-on]]\n light_tasking_stm32g0xx = \"*\"\n ```\n - if applicable, apply any runtime configuration variables (see below).\n\nThen edit your project file to add the following elements:\n - \"with\" the run-time project files. With this, gprbuild will compile the run-time before your application\n ```ada\n with \"runtime_build.gpr\";\n with \"ravenscar_build.gpr\";\n ```\n - Specify the `Target` and `Runtime` attributes:\n ```ada\n for Target use runtime_build'Target;\n for Runtime (\"Ada\") use runtime_build'Runtime (\"Ada\");\n ```\n - specify the `Linker` switches:\n ```ada\n package Linker is\n for Switches (\"Ada\") use Runtime_Build.Linker_Switches;\n end Linker;\n ```\n\nThe runtime is configurable via Alire crate configuration variables.\nSee the project website for full details of the available options.\n\nBy default, the runtime is configured for the STM32G0B1RE. If your board has\na different MCU, then you will need to specify which MCU you are using via\nthe crate configuration. For example, to configure the runtime for the\nSTM32G031J4, add the following to your `alire.toml`:\n```toml\n[configuration.values]\nlight_tasking_stm32g0xx.MCU_Sub_Family = \"G031\"\nlight_tasking_stm32g0xx.MCU_Flash_Memory_Size = \"4\"\n```\n\nBy default, the runtime configures the clock tree for a 64 MHz system clock\nfrom the high-speed internal (HSI) oscillator. If you want a different clock\nconfiguration, then use the crate configuration variables to specify the\nconfiguration you wish to use. For example, to configure the runtime to\ngenerate a 64 MHz system clock from a 24 MHz HSE crystal oscillator:\n```toml\n[configuration.values]\n# Configure a 24 MHz HSE crystal oscillator\nlight_tasking_stm32g0xx.HSE_Clock_Frequency = 24000000\nlight_tasking_stm32g0xx.HSE_Bypass = false\n\n# Select PLLRCLK as the SYSCLK source\nlight_tasking_stm32g0xx.SYSCLK_Src = \"PLLRCLK\"\n\n# Configure the PLL VCO to run at 128 MHz from the 24 MHz HSE (fVCO = fHSE * (N/M))\nlight_tasking_stm32g0xx.PLL_Src = \"HSE\"\nlight_tasking_stm32g0xx.PLL_N_Mul = 10\nlight_tasking_stm32g0xx.PLL_M_Div = 2\n\n# Configure the PLLRCLK to run at 64 MHz from the 128 MHz VCO.\nlight_tasking_stm32g0xx.PLL_R_Div = 2\n\n# Configure the AHB an APB to also run at 64 MHz\nlight_tasking_stm32g0xx.AHB_Pre = \"DIV1\"\nlight_tasking_stm32g0xx.APB_Pre = \"DIV1\"\n```\n\nThe runtime will generate a compile time error when an invalid PLL configuration\nis set.\n\nBy default the PLL's Q and P clocks are enabled. If you don't need them, then you\ncan disable them via the crate configuration:\n```toml\n[configuration.values]\nlight_tasking_stm32g0xx.PLL_Q_Enable = false\nlight_tasking_stm32g0xx.PLL_P_Enable = false\n```\n\nThe runtime will enable the PLL only when either `PLL_Q_Enable` or `PLL_P_Enable`\nis `true`, or when `SYSCLK_Src = \"PLLRCLK\"`.\n\nThe interrupt stack sizes are also configurable:\n```toml\n[configuration.values]\nlight_tasking_stm32g0xx.Interrupt_Stack_Size = 1024\nlight_tasking_stm32g0xx.Interrupt_Secondary_Stack_Size = 128\n```\n", "maintainers": [ "Daniel King " ], "maintainers-logins": [ "damaki" ], "name": "light_tasking_stm32g0xx", "origin": { "hashes": [ "sha256:4d9531ff969536a2b061e90a22a6fa4d279e68ccb970d446b49cf331a799fc9f", "sha512:72c7d99ec39e1a5074818aaec564f36cec57ab9fbabd63311fe392674c4a4fc2a2ac0bbc4d6f492f3d37ba685f07842033849cac6410c13a4938ac574d2fc047" ], "url": "https://github.com/damaki/community-bb-runtimes/releases/download/v15.4.0/light-tasking-stm32g0xx-15.4.0.tar.gz" }, "project-files": [ "runtime_build.gpr", "ravenscar_build.gpr" ], "tags": [ "embedded", "runtime", "stm32g0" ], "version": "15.4.0", "website": "https://github.com/damaki/community-bb-runtimes" }, "path": "index/li/light_tasking_stm32g0xx/light_tasking_stm32g0xx-15.4.0.toml", "version": "15.4.0" }, { "dependants": [], "dependencies": [ { "catalog": "community", "condition": null, "name": "gnat_arm_elf", "package": "gnat_arm_elf", "provided_version": "15.3.1", "requirement": "^15", "resolved": true, "version": "15.3.1" } ], "development": false, "external": false, "manifest": { "authors": [ "AdaCore", "Daniel King" ], "configuration": { "generate_c": false, "output_dir": "gnat_user", "variables": { "AHB_Pre": { "default": "DIV1", "type": "Enum", "values": [ "DIV1", "DIV2", "DIV4", "DIV8", "DIV16", "DIV64", "DIV128", "DIV256", "DIV512" ] }, "APB_Pre": { "default": "DIV1", "type": "Enum", "values": [ "DIV1", "DIV2", "DIV4", "DIV8", "DIV16" ] }, "HSE_Bypass": { "default": false, "type": "Boolean" }, "HSE_Clock_Frequency": { "default": 8000000, "first": 1, "last": 48000000, "type": "Integer" }, "HSI_Div": { "default": "DIV1", "type": "Enum", "values": [ "DIV1", "DIV2", "DIV4", "DIV8", "DIV16", "DIV32", "DIV64", "DIV128" ] }, "Interrupt_Secondary_Stack_Size": { "default": 128, "first": 1, "type": "Integer" }, "Interrupt_Stack_Size": { "default": 1024, "first": 1, "type": "Integer" }, "LSE_Bypass": { "default": false, "type": "Boolean" }, "LSE_Enabled": { "default": false, "type": "Boolean" }, "LSI_Enabled": { "default": true, "type": "Boolean" }, "MCU_Flash_Memory_Size": { "default": "B", "type": "String" }, "MCU_Sub_Family": { "default": "G0B1", "type": "Enum", "values": [ "G030", "G031", "G041", "G050", "G051", "G061", "G070", "G071", "G081", "G0B0", "G0B1", "G0C1" ] }, "PLL_M_Div": { "default": 2, "first": 1, "last": 8, "type": "Integer" }, "PLL_N_Mul": { "default": 16, "first": 8, "last": 86, "type": "Integer" }, "PLL_P_Div": { "default": 2, "first": 2, "last": 32, "type": "Integer" }, "PLL_P_Enable": { "default": true, "type": "Boolean" }, "PLL_Q_Div": { "default": 2, "first": 2, "last": 8, "type": "Integer" }, "PLL_Q_Enable": { "default": true, "type": "Boolean" }, "PLL_R_Div": { "default": 2, "first": 2, "last": 8, "type": "Integer" }, "PLL_Src": { "default": "HSI16", "type": "Enum", "values": [ "HSE", "HSI16" ] }, "RAM_Parity_Check": { "default": "Disabled", "type": "Enum", "values": [ "Disabled", "Enabled" ] }, "SYSCLK_Src": { "default": "PLLRCLK", "type": "Enum", "values": [ "LSE", "LSI", "HSE", "PLLRCLK", "HSISYS" ] } } }, "depends-on": [ { "gnat_arm_elf": "^15" } ], "description": "light-tasking runtime for the STM32G0XX SoC", "licenses": "GPL-3.0-or-later WITH GCC-exception-3.1", "long-description": "## Usage\n\nFirst edit your `alire.toml` file and add the following elements:\n - Add `light_tasking_stm32g0xx` in the dependency list:\n ```toml\n [[depends-on]]\n light_tasking_stm32g0xx = \"*\"\n ```\n - if applicable, apply any runtime configuration variables (see below).\n\nThen edit your project file to add the following elements:\n - \"with\" the run-time project files. With this, gprbuild will compile the run-time before your application\n ```ada\n with \"runtime_build.gpr\";\n with \"ravenscar_build.gpr\";\n ```\n - Specify the `Target` and `Runtime` attributes:\n ```ada\n for Target use runtime_build'Target;\n for Runtime (\"Ada\") use runtime_build'Runtime (\"Ada\");\n ```\n - specify the `Linker` switches:\n ```ada\n package Linker is\n for Switches (\"Ada\") use Runtime_Build.Linker_Switches;\n end Linker;\n ```\n\nThe runtime is configurable via Alire crate configuration variables.\nSee the project website for full details of the available options.\n\nBy default, the runtime is configured for the STM32G0B1RE. If your board has\na different MCU, then you will need to specify which MCU you are using via\nthe crate configuration. For example, to configure the runtime for the\nSTM32G031J4, add the following to your `alire.toml`:\n```toml\n[configuration.values]\nlight_tasking_stm32g0xx.MCU_Sub_Family = \"G031\"\nlight_tasking_stm32g0xx.MCU_Flash_Memory_Size = \"4\"\n```\n\nBy default, the runtime configures the clock tree for a 64 MHz system clock\nfrom the high-speed internal (HSI) oscillator. If you want a different clock\nconfiguration, then use the crate configuration variables to specify the\nconfiguration you wish to use. For example, to configure the runtime to\ngenerate a 64 MHz system clock from a 24 MHz HSE crystal oscillator:\n```toml\n[configuration.values]\n# Configure a 24 MHz HSE crystal oscillator\nlight_tasking_stm32g0xx.HSE_Clock_Frequency = 24000000\nlight_tasking_stm32g0xx.HSE_Bypass = false\n\n# Select PLLRCLK as the SYSCLK source\nlight_tasking_stm32g0xx.SYSCLK_Src = \"PLLRCLK\"\n\n# Configure the PLL VCO to run at 128 MHz from the 24 MHz HSE (fVCO = fHSE * (N/M))\nlight_tasking_stm32g0xx.PLL_Src = \"HSE\"\nlight_tasking_stm32g0xx.PLL_N_Mul = 10\nlight_tasking_stm32g0xx.PLL_M_Div = 2\n\n# Configure the PLLRCLK to run at 64 MHz from the 128 MHz VCO.\nlight_tasking_stm32g0xx.PLL_R_Div = 2\n\n# Configure the AHB an APB to also run at 64 MHz\nlight_tasking_stm32g0xx.AHB_Pre = \"DIV1\"\nlight_tasking_stm32g0xx.APB_Pre = \"DIV1\"\n```\n\nThe runtime will generate a compile time error when an invalid PLL configuration\nis set.\n\nBy default the PLL's Q and P clocks are enabled. If you don't need them, then you\ncan disable them via the crate configuration:\n```toml\n[configuration.values]\nlight_tasking_stm32g0xx.PLL_Q_Enable = false\nlight_tasking_stm32g0xx.PLL_P_Enable = false\n```\n\nThe runtime will enable the PLL only when either `PLL_Q_Enable` or `PLL_P_Enable`\nis `true`, or when `SYSCLK_Src = \"PLLRCLK\"`.\n\nThe interrupt stack sizes are also configurable:\n```toml\n[configuration.values]\nlight_tasking_stm32g0xx.Interrupt_Stack_Size = 1024\nlight_tasking_stm32g0xx.Interrupt_Secondary_Stack_Size = 128\n```\n", "maintainers": [ "Daniel King " ], "maintainers-logins": [ "damaki" ], "name": "light_tasking_stm32g0xx", "origin": { "hashes": [ "sha256:ba2a1d471aefa93317863e5a8b666d433e61c3aedf5d9381fd3fd91cee1a1899", "sha512:190a7d697fcd14a4c26ffd921413b79ef8a0dd9d141f0c765e6353cf68e7334427ed4f4aff331743b68c88f18406bd35ab06279180afc6e27ee21fdf72f28e04" ], "url": "https://github.com/damaki/community-bb-runtimes/releases/download/v15.3.0/light-tasking-stm32g0xx-15.3.0.tar.gz" }, "project-files": [ "runtime_build.gpr", "ravenscar_build.gpr" ], "tags": [ "embedded", "runtime", "stm32g0" ], "version": "15.3.0", "website": "https://github.com/damaki/community-bb-runtimes" }, "path": "index/li/light_tasking_stm32g0xx/light_tasking_stm32g0xx-15.3.0.toml", "version": "15.3.0" }, { "dependants": [], "dependencies": [ { "catalog": "community", "condition": null, "name": "gnat_arm_elf", "package": "gnat_arm_elf", "provided_version": "15.3.1", "requirement": "^15", "resolved": true, "version": "15.3.1" } ], "development": false, "external": false, "manifest": { "authors": [ "AdaCore", "Daniel King" ], "configuration": { "generate_c": false, "output_dir": "gnat_user", "variables": { "AHB_Pre": { "default": "DIV1", "type": "Enum", "values": [ "DIV1", "DIV2", "DIV4", "DIV8", "DIV16", "DIV64", "DIV128", "DIV256", "DIV512" ] }, "APB_Pre": { "default": "DIV1", "type": "Enum", "values": [ "DIV1", "DIV2", "DIV4", "DIV8", "DIV16" ] }, "HSE_Bypass": { "default": false, "type": "Boolean" }, "HSE_Clock_Frequency": { "default": 8000000, "first": 1, "last": 48000000, "type": "Integer" }, "HSI_Div": { "default": "DIV1", "type": "Enum", "values": [ "DIV1", "DIV2", "DIV4", "DIV8", "DIV16", "DIV32", "DIV64", "DIV128" ] }, "Interrupt_Secondary_Stack_Size": { "default": 128, "first": 1, "type": "Integer" }, "Interrupt_Stack_Size": { "default": 1024, "first": 1, "type": "Integer" }, "LSE_Bypass": { "default": false, "type": "Boolean" }, "LSE_Enabled": { "default": false, "type": "Boolean" }, "LSI_Enabled": { "default": true, "type": "Boolean" }, "MCU_Flash_Memory_Size": { "default": "B", "type": "String" }, "MCU_Sub_Family": { "default": "G0B1", "type": "Enum", "values": [ "G030", "G031", "G041", "G050", "G051", "G061", "G070", "G071", "G081", "G0B0", "G0B1", "G0C1" ] }, "PLL_M_Div": { "default": 2, "first": 1, "last": 8, "type": "Integer" }, "PLL_N_Mul": { "default": 16, "first": 8, "last": 86, "type": "Integer" }, "PLL_P_Div": { "default": 2, "first": 2, "last": 32, "type": "Integer" }, "PLL_P_Enable": { "default": true, "type": "Boolean" }, "PLL_Q_Div": { "default": 2, "first": 2, "last": 8, "type": "Integer" }, "PLL_Q_Enable": { "default": true, "type": "Boolean" }, "PLL_R_Div": { "default": 2, "first": 2, "last": 8, "type": "Integer" }, "PLL_Src": { "default": "HSI16", "type": "Enum", "values": [ "HSE", "HSI16" ] }, "RAM_Parity_Check": { "default": "Disabled", "type": "Enum", "values": [ "Disabled", "Enabled" ] }, "SYSCLK_Src": { "default": "PLLRCLK", "type": "Enum", "values": [ "LSE", "LSI", "HSE", "PLLRCLK", "HSISYS" ] } } }, "depends-on": [ { "gnat_arm_elf": "^15" } ], "description": "light-tasking runtime for the STM32G0XX SoC", "licenses": "GPL-3.0-or-later WITH GCC-exception-3.1", "long-description": "## Usage\n\nFirst edit your `alire.toml` file and add the following elements:\n - Add `light_tasking_stm32g0xx` in the dependency list:\n ```toml\n [[depends-on]]\n light_tasking_stm32g0xx = \"*\"\n ```\n - if applicable, apply any runtime configuration variables (see below).\n\nThen edit your project file to add the following elements:\n - \"with\" the run-time project files. With this, gprbuild will compile the run-time before your application\n ```ada\n with \"runtime_build.gpr\";\n with \"ravenscar_build.gpr\";\n ```\n - Specify the `Target` and `Runtime` attributes:\n ```ada\n for Target use runtime_build'Target;\n for Runtime (\"Ada\") use runtime_build'Runtime (\"Ada\");\n ```\n - specify the `Linker` switches:\n ```ada\n package Linker is\n for Switches (\"Ada\") use Runtime_Build.Linker_Switches;\n end Linker;\n ```\n\nThe runtime is configurable via Alire crate configuration variables.\nSee the project website for full details of the available options.\n\nBy default, the runtime is configured for the STM32G0B1RE. If your board has\na different MCU, then you will need to specify which MCU you are using via\nthe crate configuration. For example, to configure the runtime for the\nSTM32G031J4, add the following to your `alire.toml`:\n```toml\n[configuration.values]\nlight_tasking_stm32g0xx.MCU_Sub_Family = \"G031\"\nlight_tasking_stm32g0xx.MCU_Flash_Memory_Size = \"4\"\n```\n\nBy default, the runtime configures the clock tree for a 64 MHz system clock\nfrom the high-speed internal (HSI) oscillator. If you want a different clock\nconfiguration, then use the crate configuration variables to specify the\nconfiguration you wish to use. For example, to configure the runtime to\ngenerate a 64 MHz system clock from a 24 MHz HSE crystal oscillator:\n```toml\n[configuration.values]\n# Configure a 24 MHz HSE crystal oscillator\nlight_tasking_stm32g0xx.HSE_Clock_Frequency = 24000000\nlight_tasking_stm32g0xx.HSE_Bypass = false\n\n# Select PLLRCLK as the SYSCLK source\nlight_tasking_stm32g0xx.SYSCLK_Src = \"PLLRCLK\"\n\n# Configure the PLL VCO to run at 128 MHz from the 24 MHz HSE (fVCO = fHSE * (N/M))\nlight_tasking_stm32g0xx.PLL_Src = \"HSE\"\nlight_tasking_stm32g0xx.PLL_N_Mul = 10\nlight_tasking_stm32g0xx.PLL_M_Div = 2\n\n# Configure the PLLRCLK to run at 64 MHz from the 128 MHz VCO.\nlight_tasking_stm32g0xx.PLL_R_Div = 2\n\n# Configure the AHB an APB to also run at 64 MHz\nlight_tasking_stm32g0xx.AHB_Pre = \"DIV1\"\nlight_tasking_stm32g0xx.APB_Pre = \"DIV1\"\n```\n\nThe runtime will generate a compile time error when an invalid PLL configuration\nis set.\n\nBy default the PLL's Q and P clocks are enabled. If you don't need them, then you\ncan disable them via the crate configuration:\n```toml\n[configuration.values]\nlight_tasking_stm32g0xx.PLL_Q_Enable = false\nlight_tasking_stm32g0xx.PLL_P_Enable = false\n```\n\nThe runtime will enable the PLL only when either `PLL_Q_Enable` or `PLL_P_Enable`\nis `true`, or when `SYSCLK_Src = \"PLLRCLK\"`.\n\nThe interrupt stack sizes are also configurable:\n```toml\n[configuration.values]\nlight_tasking_stm32g0xx.Interrupt_Stack_Size = 1024\nlight_tasking_stm32g0xx.Interrupt_Secondary_Stack_Size = 128\n```\n", "maintainers": [ "Daniel King " ], "maintainers-logins": [ "damaki" ], "name": "light_tasking_stm32g0xx", "origin": { "hashes": [ "sha256:95ca9779c6137e68413cfe72e3f5ceb17b49572a316e9980f8b2c1f6deabf37c", "sha512:526699dfdb5928079e350384f0cdf7887104ed626668b6e3bd13a1ae5a784d394c1a8f883aac90238dcd4863531b38b8ae7bdd35e7d1e3a28d574b5278dfedf6" ], "url": "https://github.com/damaki/community-bb-runtimes/releases/download/v15.2.0/light-tasking-stm32g0xx-15.2.0.tar.gz" }, "project-files": [ "runtime_build.gpr", "ravenscar_build.gpr" ], "tags": [ "embedded", "runtime", "stm32g0" ], "version": "15.2.0", "website": "https://github.com/damaki/community-bb-runtimes" }, "path": "index/li/light_tasking_stm32g0xx/light_tasking_stm32g0xx-15.2.0.toml", "version": "15.2.0" }, { "dependants": [], "dependencies": [ { "catalog": "community", "condition": null, "name": "gnat_arm_elf", "package": "gnat_arm_elf", "provided_version": "15.3.1", "requirement": "^15", "resolved": true, "version": "15.3.1" } ], "development": false, "external": false, "manifest": { "authors": [ "AdaCore", "Daniel King" ], "configuration": { "generate_c": false, "output_dir": "gnat_user", "variables": { "AHB_Pre": { "default": "DIV1", "type": "Enum", "values": [ "DIV1", "DIV2", "DIV4", "DIV8", "DIV16", "DIV64", "DIV128", "DIV256", "DIV512" ] }, "APB_Pre": { "default": "DIV1", "type": "Enum", "values": [ "DIV1", "DIV2", "DIV4", "DIV8", "DIV16" ] }, "HSE_Bypass": { "default": false, "type": "Boolean" }, "HSE_Clock_Frequency": { "default": 8000000, "first": 1, "last": 48000000, "type": "Integer" }, "HSI_Div": { "default": "DIV1", "type": "Enum", "values": [ "DIV1", "DIV2", "DIV4", "DIV8", "DIV16", "DIV32", "DIV64", "DIV128" ] }, "Interrupt_Secondary_Stack_Size": { "default": 128, "first": 1, "type": "Integer" }, "Interrupt_Stack_Size": { "default": 1024, "first": 1, "type": "Integer" }, "LSE_Bypass": { "default": false, "type": "Boolean" }, "LSE_Enabled": { "default": false, "type": "Boolean" }, "LSI_Enabled": { "default": true, "type": "Boolean" }, "MCU_Flash_Memory_Size": { "default": "B", "type": "String" }, "MCU_Sub_Family": { "default": "G0B1", "type": "Enum", "values": [ "G030", "G031", "G041", "G050", "G051", "G061", "G070", "G071", "G081", "G0B0", "G0B1", "G0C1" ] }, "PLL_M_Div": { "default": 2, "first": 1, "last": 8, "type": "Integer" }, "PLL_N_Mul": { "default": 16, "first": 8, "last": 86, "type": "Integer" }, "PLL_P_Div": { "default": 2, "first": 2, "last": 32, "type": "Integer" }, "PLL_P_Enable": { "default": true, "type": "Boolean" }, "PLL_Q_Div": { "default": 2, "first": 2, "last": 8, "type": "Integer" }, "PLL_Q_Enable": { "default": true, "type": "Boolean" }, "PLL_R_Div": { "default": 2, "first": 2, "last": 8, "type": "Integer" }, "PLL_Src": { "default": "HSI16", "type": "Enum", "values": [ "HSE", "HSI16" ] }, "RAM_Parity_Check": { "default": "Disabled", "type": "Enum", "values": [ "Disabled", "Enabled" ] }, "SYSCLK_Src": { "default": "PLLRCLK", "type": "Enum", "values": [ "LSE", "LSI", "HSE", "PLLRCLK", "HSISYS" ] } } }, "depends-on": [ { "gnat_arm_elf": "^15" } ], "description": "light-tasking runtime for the STM32G0xx SoC", "licenses": "GPL-3.0-or-later WITH GCC-exception-3.1", "long-description": "## Usage\n\nFirst edit your `alire.toml` file and add the following elements:\n - Add `light_tasking_stm32g0xx` in the dependency list:\n ```toml\n [[depends-on]]\n light_tasking_stm32g0xx = \"*\"\n ```\n - if applicable, apply any runtime configuration variables (see below).\n\nThen edit your project file to add the following elements:\n - \"with\" the run-time project files. With this, gprbuild will compile the run-time before your application\n ```ada\n with \"runtime_build.gpr\";\n with \"ravenscar_build.gpr\";\n ```\n - Specify the `Target` and `Runtime` attributes:\n ```ada\n for Target use runtime_build'Target;\n for Runtime (\"Ada\") use runtime_build'Runtime (\"Ada\");\n ```\n - specify the `Linker` switches:\n ```ada\n package Linker is\n for Switches (\"Ada\") use Runtime_Build.Linker_Switches;\n end Linker;\n ```\n\nThe runtime is configurable via Alire crate configuration variables.\nSee the project website for full details of the available options.\n\nBy default, the runtime is configured for the STM32G0B1RE. If your board has\na different MCU, then you will need to specify which MCU you are using via\nthe crate configuration. For example, to configure the runtime for the\nSTM32G031J4, add the following to your `alire.toml`:\n```toml\n[configuration.values]\nlight_tasking_stm32g0xx.MCU_Sub_Family = \"G031\"\nlight_tasking_stm32g0xx.MCU_Flash_Memory_Size = \"4\"\n```\n\nBy default, the runtime configures the clock tree for a 64 MHz system clock\nfrom the high-speed internal (HSI) oscillator. If you want a different clock\nconfiguration, then use the crate configuration variables to specify the\nconfiguration you wish to use. For example, to configure the runtime to\ngenerate a 64 MHz system clock from a 24 MHz HSE crystal oscillator:\n```toml\n[configuration.values]\n# Configure a 24 MHz HSE crystal oscillator\nlight_tasking_stm32g0xx.HSE_Clock_Frequency = 24000000\nlight_tasking_stm32g0xx.HSE_Bypass = false\n\n# Select PLLRCLK as the SYSCLK source\nlight_tasking_stm32g0xx.SYSCLK_Src = \"PLLRCLK\"\n\n# Configure the PLL VCO to run at 128 MHz from the 24 MHz HSE (fVCO = fHSE * (N/M))\nlight_tasking_stm32g0xx.PLL_Src = \"HSE\"\nlight_tasking_stm32g0xx.PLL_N_Mul = 10\nlight_tasking_stm32g0xx.PLL_M_Div = 2\n\n# Configure the PLLRCLK to run at 64 MHz from the 128 MHz VCO.\nlight_tasking_stm32g0xx.PLL_R_Div = 2\n\n# Configure the AHB an APB to also run at 64 MHz\nlight_tasking_stm32g0xx.AHB_Pre = \"DIV1\"\nlight_tasking_stm32g0xx.APB_Pre = \"DIV1\"\n```\n\nThe runtime will generate a compile time error when an invalid PLL configuration\nis set.\n\nBy default the PLL's Q and P clocks are enabled. If you don't need them, then you\ncan disable them via the crate configuration:\n```toml\n[configuration.values]\nlight_tasking_stm32g0xx.PLL_Q_Enable = false\nlight_tasking_stm32g0xx.PLL_P_Enable = false\n```\n\nThe runtime will enable the PLL only when either `PLL_Q_Enable` or `PLL_P_Enable`\nis `true`, or when `SYSCLK_Src = \"PLLRCLK\"`.\n\nThe interrupt stack sizes are also configurable:\n```toml\n[configuration.values]\nlight_tasking_stm32g0xx.Interrupt_Stack_Size = 1024\nlight_tasking_stm32g0xx.Interrupt_Secondary_Stack_Size = 128\n```\n", "maintainers": [ "Daniel King " ], "maintainers-logins": [ "damaki" ], "name": "light_tasking_stm32g0xx", "origin": { "hashes": [ "sha256:b916029ef717d3dc1099ceed8857ae48f57e112a8567978e6c5c3a835f86667d", "sha512:a395f1da6501d872cdeecdd9ef5dd986d312dbf3dc8942460a76a4cbf3d89b8934a1cc338cfc12308f76330138edee5874e51f147355b919f5bdf4549e07586e" ], "url": "https://github.com/damaki/stm32g0xx-runtimes/releases/download/v15.0.1/light-tasking-stm32g0xx-15.0.1.tar.gz" }, "project-files": [ "runtime_build.gpr", "ravenscar_build.gpr" ], "tags": [ "embedded", "runtime", "stm32g0" ], "version": "15.0.1", "website": "https://github.com/damaki/stm32g0xx-runtimes" }, "path": "index/li/light_tasking_stm32g0xx/light_tasking_stm32g0xx-15.0.1.toml", "version": "15.0.1" }, { "dependants": [], "dependencies": [ { "catalog": "community", "condition": null, "name": "gnat_arm_elf", "package": "gnat_arm_elf", "provided_version": "15.3.1", "requirement": "^15", "resolved": true, "version": "15.3.1" } ], "development": false, "external": false, "manifest": { "authors": [ "AdaCore", "Daniel King" ], "configuration": { "generate_c": false, "output_dir": "gnat_user", "variables": { "AHB_Pre": { "default": "DIV1", "type": "Enum", "values": [ "DIV1", "DIV2", "DIV4", "DIV8", "DIV16", "DIV64", "DIV128", "DIV256", "DIV512" ] }, "APB_Pre": { "default": "DIV1", "type": "Enum", "values": [ "DIV1", "DIV2", "DIV4", "DIV8", "DIV16" ] }, "HSE_Bypass": { "default": false, "type": "Boolean" }, "HSE_Clock_Frequency": { "default": 8000000, "first": 1, "last": 48000000, "type": "Integer" }, "HSI_Div": { "default": "DIV1", "type": "Enum", "values": [ "DIV1", "DIV2", "DIV4", "DIV8", "DIV16", "DIV32", "DIV64", "DIV128" ] }, "Interrupt_Secondary_Stack_Size": { "default": 128, "first": 1, "type": "Integer" }, "Interrupt_Stack_Size": { "default": 1024, "first": 1, "type": "Integer" }, "LSE_Bypass": { "default": false, "type": "Boolean" }, "LSE_Enabled": { "default": false, "type": "Boolean" }, "LSI_Enabled": { "default": true, "type": "Boolean" }, "MCU_Flash_Memory_Size": { "default": "B", "type": "String" }, "MCU_Sub_Family": { "default": "G0B1", "type": "Enum", "values": [ "G030", "G031", "G041", "G050", "G051", "G061", "G070", "G071", "G081", "G0B0", "G0B1", "G0C1" ] }, "PLL_M_Div": { "default": 2, "first": 1, "last": 8, "type": "Integer" }, "PLL_N_Mul": { "default": 16, "first": 8, "last": 86, "type": "Integer" }, "PLL_P_Div": { "default": 2, "first": 2, "last": 32, "type": "Integer" }, "PLL_P_Enable": { "default": true, "type": "Boolean" }, "PLL_Q_Div": { "default": 2, "first": 2, "last": 8, "type": "Integer" }, "PLL_Q_Enable": { "default": true, "type": "Boolean" }, "PLL_R_Div": { "default": 2, "first": 2, "last": 8, "type": "Integer" }, "PLL_Src": { "default": "HSI16", "type": "Enum", "values": [ "HSE", "HSI16" ] }, "RAM_Parity_Check": { "default": "Disabled", "type": "Enum", "values": [ "Disabled", "Enabled" ] }, "SYSCLK_Src": { "default": "PLLRCLK", "type": "Enum", "values": [ "LSE", "LSI", "HSE", "PLLRCLK", "HSISYS" ] } } }, "depends-on": [ { "gnat_arm_elf": "^15" } ], "description": "light-tasking runtime for the STM32G0xx SoC", "licenses": "GPL-3.0-or-later WITH GCC-exception-3.1", "long-description": "## Usage\n\nFirst edit your `alire.toml` file and add the following elements:\n - Add `light_tasking_stm32g0xx` in the dependency list:\n ```toml\n [[depends-on]]\n light_tasking_stm32g0xx = \"*\"\n ```\n - if applicable, apply any runtime configuration variables (see below).\n\nThen edit your project file to add the following elements:\n - \"with\" the run-time project file. With this, gprbuild will compile the run-time before your application\n ```ada\n with \"runtime_build.gpr\";\n ```\n - Specify the `Target` and `Runtime` attributes:\n ```ada\n for Target use runtime_build'Target;\n for Runtime (\"Ada\") use runtime_build'Runtime (\"Ada\");\n ```\n - specify the `Linker` switches:\n ```ada\n package Linker is\n for Switches (\"Ada\") use Runtime_Build.Linker_Switches;\n end Linker;\n ```\n\nThe runtime is configurable via Alire crate configuration variables.\nSee the project website for full details of the available options.\n\nBy default, the runtime is configured for the STM32G0B1RE. If your board has\na different MCU, then you will need to specify which MCU you are using via\nthe crate configuration. For example, to configure the runtime for the\nSTM32G031J4, add the following to your `alire.toml`:\n```toml\n[configuration.values]\nlight_tasking_stm32g0xx.MCU_Sub_Family = \"G031\"\nlight_tasking_stm32g0xx.MCU_Flash_Memory_Size = \"4\"\n```\n\nBy default, the runtime configures the clock tree for a 64 MHz system clock\nfrom the high-speed internal (HSI) oscillator. If you want a different clock\nconfiguration, then use the crate configuration variables to specify the\nconfiguration you wish to use. For example, to configure the runtime to\ngenerate a 64 MHz system clock from a 24 MHz HSE crystal oscillator:\n```toml\n[configuration.values]\n# Configure a 24 MHz HSE crystal oscillator\nlight_tasking_stm32g0xx.HSE_Clock_Frequency = 24000000\nlight_tasking_stm32g0xx.HSE_Bypass = false\n\n# Select PLLRCLK as the SYSCLK source\nlight_tasking_stm32g0xx.SYSCLK_Src = \"PLLRCLK\"\n\n# Configure the PLL VCO to run at 128 MHz from the 24 MHz HSE (fVCO = fHSE * (N/M))\nlight_tasking_stm32g0xx.PLL_Src = \"HSE\"\nlight_tasking_stm32g0xx.PLL_N_Mul = 10\nlight_tasking_stm32g0xx.PLL_M_Div = 2\n\n# Configure the PLLRCLK to run at 64 MHz from the 128 MHz VCO.\nlight_tasking_stm32g0xx.PLL_R_Div = 2\n\n# Configure the AHB an APB to also run at 64 MHz\nlight_tasking_stm32g0xx.AHB_Pre = \"DIV1\"\nlight_tasking_stm32g0xx.APB_Pre = \"DIV1\"\n```\n\nThe runtime will generate a compile time error when an invalid PLL configuration\nis set.\n\nBy default the PLL's Q and P clocks are enabled. If you don't need them, then you\ncan disable them via the crate configuration:\n```toml\n[configuration.values]\nlight_tasking_stm32g0xx.PLL_Q_Enable = false\nlight_tasking_stm32g0xx.PLL_P_Enable = false\n```\n\nThe runtime will enable the PLL only when either `PLL_Q_Enable` or `PLL_P_Enable`\nis `true`, or when `SYSCLK_Src = \"PLLRCLK\"`.\n\nThe interrupt stack sizes are also configurable:\n```toml\n[configuration.values]\nlight_tasking_stm32g0xx.Interrupt_Stack_Size = 1024\nlight_tasking_stm32g0xx.Interrupt_Secondary_Stack_Size = 128\n```\n", "maintainers": [ "Daniel King " ], "maintainers-logins": [ "damaki" ], "name": "light_tasking_stm32g0xx", "origin": { "hashes": [ "sha256:b1bb4a3492960c962ed3fdd09f11fdc56f57d6f7cf491198e9d4f9dbbd93a0ad", "sha512:71225a0e0595f1cf7f6ff5b59842f4fdcfd9cd55cf64b1bac240d1e2a9e161a30c17e57e9dee91d787702a27054c4364af244d2f2349536da22b0c81b589bbcb" ], "url": "https://github.com/damaki/stm32g0xx-runtimes/releases/download/v15.0.0/light-tasking-stm32g0xx-15.0.0.tar.gz" }, "project-files": [ "runtime_build.gpr", "ravenscar_build.gpr" ], "tags": [ "embedded", "runtime", "stm32g0" ], "version": "15.0.0", "website": "https://github.com/damaki/stm32g0xx-runtimes" }, "path": "index/li/light_tasking_stm32g0xx/light_tasking_stm32g0xx-15.0.0.toml", "version": "15.0.0" } ] }, "schema_version": 4 }