{ "authors": [ "AdaCore", "Daniel King" ], "configuration": { "generate_c": false, "output_dir": "gnat_user", "variables": { "AHB_Pre": { "default": "DIV1", "type": "Enum", "values": [ "DIV1", "DIV2", "DIV4", "DIV8", "DIV16", "DIV64", "DIV128", "DIV256", "DIV512" ] }, "APB1_Pre": { "default": "DIV1", "type": "Enum", "values": [ "DIV1", "DIV2", "DIV4", "DIV8", "DIV16" ] }, "APB2_Pre": { "default": "DIV1", "type": "Enum", "values": [ "DIV1", "DIV2", "DIV4", "DIV8", "DIV16" ] }, "HSE_Bypass": { "default": false, "type": "Boolean" }, "HSE_Clock_Frequency": { "default": 24000000, "first": 4000000, "last": 48000000, "type": "Integer" }, "Interrupt_Secondary_Stack_Size": { "default": 128, "first": 1, "type": "Integer" }, "Interrupt_Stack_Size": { "default": 1024, "first": 1, "type": "Integer" }, "LSE_Bypass": { "default": false, "type": "Boolean" }, "LSE_Enabled": { "default": false, "type": "Boolean" }, "LSI_Enabled": { "default": true, "type": "Boolean" }, "MCU_Flash_Memory_Size": { "default": "E", "type": "String" }, "MCU_Sub_Family": { "default": "G474", "type": "Enum", "values": [ "G431", "G441", "G491", "G4A1", "G473", "G483", "G474", "G484" ] }, "PLL_M_Div": { "default": 4, "first": 1, "last": 16, "type": "Integer" }, "PLL_N_Mul": { "default": 85, "first": 8, "last": 127, "type": "Integer" }, "PLL_P_Div": { "default": 2, "first": 2, "last": 31, "type": "Integer" }, "PLL_P_Enable": { "default": true, "type": "Boolean" }, "PLL_Q_Div": { "default": "DIV2", "type": "Enum", "values": [ "DIV2", "DIV4", "DIV6", "DIV8" ] }, "PLL_Q_Enable": { "default": true, "type": "Boolean" }, "PLL_R_Div": { "default": "DIV2", "type": "Enum", "values": [ "DIV2", "DIV4", "DIV6", "DIV8" ] }, "PLL_Src": { "default": "HSI16", "type": "Enum", "values": [ "HSE", "HSI16" ] }, "SYSCLK_Src": { "default": "PLLRCLK", "type": "Enum", "values": [ "HSI16", "HSE", "PLLRCLK" ] } } }, "depends-on": [ { "gnat_arm_elf": "^15" } ], "description": "light-tasking runtime for the STM32G4XX SoC", "licenses": "GPL-3.0-or-later WITH GCC-exception-3.1", "long-description": "## Usage\n\nFirst edit your `alire.toml` file and add the following elements:\n - Add `light_tasking_stm32g4xx` in the dependency list:\n ```toml\n [[depends-on]]\n light_tasking_stm32g4xx = \"*\"\n ```\n - if applicable, apply any runtime configuration variables (see below).\n\nThen edit your project file to add the following elements:\n - \"with\" the run-time project files. With this, gprbuild will compile the run-time before your application\n ```ada\n with \"runtime_build.gpr\";\n with \"ravenscar_build.gpr\";\n ```\n - Specify the `Target` and `Runtime` attributes:\n ```ada\n for Target use runtime_build'Target;\n for Runtime (\"Ada\") use runtime_build'Runtime (\"Ada\");\n ```\n - specify the `Linker` switches:\n ```ada\n package Linker is\n for Switches (\"Ada\") use Runtime_Build.Linker_Switches;\n end Linker;\n ```\n\nThe runtime is configurable via Alire crate configuration variables.\nSee the project website for full details of the available options.\n\nBy default, the runtime is configured for the STM32G474RE. If you are using\na different MCU, then you will need to configure the runtime by adding the\nfollowing to your `alire.toml`. For example, to configure the runtime for the\nSTM32G431K6:\n```toml\n[configuration.values]\nlight_tasking_stm32g4xx.MCU_Sub_Family = \"G431\"\nlight_tasking_stm32g4xx.MCU_Flash_Memory_Size = \"6\"\n```\n\nBy default, the runtime configures the clock tree for a 170 MHz system clock\nfrom the high-speed internal (HSI) oscillator. If you want a different clock\nconfiguration, then use the crate configuration variables to specify the\nconfiguration you wish to use. For example, to configure the runtime to\ngenerate a 170 MHz system clock from a 24 MHz HSE crystal oscillator:\n```toml\n[configuration.values]\n# Configure a 24 MHz HSE crystal oscillator\nlight_tasking_stm32g4xx.HSE_Clock_Frequency = 24000000\nlight_tasking_stm32g4xx.HSE_Bypass = false\n\n# Select PLLRCLK as the SYSCLK source\nlight_tasking_stm32g4xx.SYSCLK_Src = \"PLLRCLK\"\n\n# Configure the PLL VCO to run at 340 MHz from the 24 MHz HSE (fVCO = fHSE * (N/M))\nlight_tasking_stm32g4xx.PLL_Src = \"HSE\"\nlight_tasking_stm32g4xx.PLL_N_Mul = 85\nlight_tasking_stm32g4xx.PLL_M_Div = 6\n\n# Configure the PLLRCLK to run at 170 MHz from the 340 MHz VCO.\nlight_tasking_stm32g4xx.PLL_R_Div = 2\n\n# Configure the AHB and APB to also run at 170 MHz\nlight_tasking_stm32g4xx.AHB_Pre = \"DIV1\"\nlight_tasking_stm32g4xx.APB1_Pre = \"DIV1\"\nlight_tasking_stm32g4xx.APB2_Pre = \"DIV1\"\n```\n\nThe runtime will generate a compile time error when an invalid PLL configuration\nis set.\n\nBy default the PLL's Q and P clocks are enabled. If you don't need them, then you\ncan disable them via the crate configuration:\n```toml\n[configuration.values]\nlight_tasking_stm32g4xx.PLL_Q_Enable = false\nlight_tasking_stm32g4xx.PLL_P_Enable = false\n```\n\nThe runtime will enable the PLL only when either `PLL_Q_Enable` or `PLL_P_Enable`\nis `true`, or when `SYSCLK_Src = \"PLLRCLK\"`.\n\nThe interrupt stack sizes are also configurable:\n```toml\n[configuration.values]\nlight_tasking_stm32g4xx.Interrupt_Stack_Size = 1024\nlight_tasking_stm32g4xx.Interrupt_Secondary_Stack_Size = 128\n```\n", "maintainers": [ "Daniel King " ], "maintainers-logins": [ "damaki" ], "name": "light_tasking_stm32g4xx", "origin": { "hashes": [ "sha256:8c653d8c46cef9dd638a097e0d6b492e465e3000e76410482ef69d4e6c95cd46", "sha512:cc4ffa82d8bb9b6bd2c8dd81e3d2127308e1fd0101bc3df1f418a532a0e3e2da64f6026cf7a7b6e93b28ec02a4ead2430a3c52880efde5ffc8a2bd91173d8af7" ], "url": "https://github.com/damaki/community-bb-runtimes/releases/download/v15.2.0/light-tasking-stm32g4xx-15.2.0.tar.gz" }, "project-files": [ "runtime_build.gpr", "ravenscar_build.gpr" ], "tags": [ "embedded", "runtime", "stm32g4" ], "version": "15.2.0", "website": "https://github.com/damaki/community-bb-runtimes" }